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Re: [OCLUG-Tech] One last Power on Question. -- Correction

Thanks Bill

That clears most of it up.

On Sat, 2007-09-08 at 12:30 -0400, Bill Strosberg wrote:

>   
> I believe the instruction pointer of the CPU is initialized at that 
> address, therefore it starts executing there.  The CPU first starts 
> executing on boot wherever the IP says to.
> 
That makes sense.  It would be handy to have something at an address
that is the same address as would appear in a newly started address
register (namely ffff:0000).


> The concept of shadow RAM for BIOS ROM dates back to bank switching days 
> - both are mapped to the same physical address at different times.  
> First, the ROM is at the address, and one of it's operations is to copy 
> itself to RAM at a different address.  
Understood

> Once it is copied, the address 
> lines to the ROM chips are "switched off" 

Good.  I was looking for the hardware function that would facilitate the very
initial stages of the bootstrap before software was running.

> and the address lines of the 
> RAM are switched into the location where the ROM was.  This has the 
> effect of replacing the ROM based programs with copies running in RAM.  
> The RAM is faster to read than ROM, therefore BIOS operations are 
> commensurately faster.

Got that.

>  
> All addresses, ROM and RAM are mapped into the same contiguous address 
> space for a CPU.  It is an arbitrary allocation of addresses based on 
> convention and history.  

I figured as much, but nobody had actually said that and I have been
wrong going with my assumptions before.  Can you suggest a site or some
search criteria that would show the history and/or configuration etc.  I
got close but no cigar at wikipedia MTTR.

> Some of the address ranges are for memory 
> mapped devices - like video cards where two CPUs access the shared (dual 
> port) RAM from different address spaces.  Think about it - your video 
> card has a CPU, and your system has a CPU - both communicate via shared RAM.
> 
> > In both statements, there is mention of two separate ROM addresses as
> > opposed to the computer's RAM addresses.  How does the CPU know that a
> > particular address is ROM based, located in a different place than RAM?
> > For example, using the above mentioned ROM addresses does, the FFFF: or
> > the C000: signify a specific location for the ROMs?
> >   
> The CPU doesn't care or inherently "know" if an address is ROM or RAM -

I understood that, but the MMU or something has to get an instruction
from somewhere telling it where to fetch or store something, even if 
=> the address for
=> that location is stored in memory in a single cell or within a memory map.
Ultimately the ROM data travels on different buses etc. and is
physically in a different location (ie at a unique address).  Would the 
driver for a device act as the translator or pointer?

>  
> although they operate at different speeds, and one is writable.  Where 
> stuff is located goes back to initial PC design and subsequent revisions.

Looking for a site that explains.  Don't need a lot of history, just a
touch and feel.  Even if the location of "stuff" goes back, there is a
location and there is a reason such, as it is.


-- 
Regards Bill


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